Register Descriptions - NXP Semiconductors MPC5644A Reference Manual

Table 12-3. Flash configuration register memory map (continued)
Offset from
FLASH_x_
REGS_BASE
0x003C
0x0040
0x0044
0x0048
0x004C
0x0050
0x0054
0x0058
0x005C – 0x3FFF
1
FLASH_A_REGS_BASE = 0xC3F8_8000
FLASH_B_REGS_BASE = 0xC3F8_C000
2
Register is only accessible via Flash A. Treat as "Reserved" in Flash B.
12.3.2

Register descriptions

This section lists the flash memory registers in address order and describes the registers and their bitfields.
12.3.2.1 Module Configuration Register (MCR)
Freescale Semiconductor
1
FLASH_x_UT0—User Test 0 Register
FLASH_x_UT1—User Test 1 Register
FLASH_x_UT2—User Test 2 Register
UMISR0—User Multiple Input Signature Register 0
UMISR1—User Multiple Input Signature Register 1
UMISR2—User Multiple Input Signature Register 2
UMISR3—User Multiple Input Signature Register 3
UMISR4—User Multiple Input Signature Register 4
Reserved
MPC5644A Microcontroller Reference Manual, Rev. 6
Register
Flash memory
Location
on page
12-238
on page
12-240
on page
12-241
on page
12-241
on page
12-241
on page
12-241
on page
12-241
on page
12-241
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