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System Integration Unit (SIU)
Signal
Primary
ETPU_A[17]
ALT1
DSPI_D_PCS[2]
ALT2
RCH3_A
GPIO
GPIO[131]
1
In cases where an I/O function can be either an input or an output, I/O direction is specified using the IBE and OBE
bits. Set IBE = 1 for input or OBE = 1 for output.
2
For I/O functions that change direction dynamically, such as the external data bus, switching between input and
output is handled internally and the IBE and OBE bits are ignored.
16.6.15.85 Pad Configuration Register 132 (SIU_PCR132)
SIU_BASE+0x148
0
1
R
0
0
W
Reset
0
0
= Unimplemented or Reserved
1
The OBE bit must be set to one for both ETPUA and GPIO when configured as outputs.
2
The IBE bit must be set to one for both ETPUA and GPIO when configured as inputs. When configured as PCS, or
ETPUA or GPO outputs, the IBE bit may be set to one to reflect the pin state in the corresponding GPDI register.
3
The weak pull up/down selection at reset for the ETPU_A[18] pin is determined by the WKPCFG pin.
Signal
Primary
ETPU_A[18]
ALT1
DSPI_D_PCS[3]
ALT2
RCH4_A
GPIO
GPIO[132]
1
In cases where an I/O function can be either an input or an output, I/O direction is specified using the IBE and OBE
bits. Set IBE = 1 for input or OBE = 1 for output.
2
For I/O functions that change direction dynamically, such as the external data bus, switching between input and
output is handled internally and the IBE and OBE bits are ignored.
472
Table 16-120. SIU_PCR131 PA values
Name
Module
eTPU
DSPI
Reaction
SIU
2
3
4
5
6
0
PA
OBE
0
0
0
0
0
Figure 16-118. Pad Configuration Register (SIU_PCR132)
Table 16-121. SIU_PCR132 PA values
Name
Module
eTPU
DSPI
Reaction
SIU
MPC5644A Microcontroller Reference Manual, Rev. 6
Description
eTPU channel
I/O
Chip select
O
Reaction channel O
GPIO
I/O
7
8
9
10
1
2
IBE
0
0
ODE
0
0
0
0
Description
eTPU channel
I/O
Chip select
O
Reaction channel O
GPIO
I/O
1,2
I/O
PA value
0b001
0b010
0b100
0b000
11
12
13
14
15
HYS
SRC
WPE
WPS
0
0
0
1
WKP
1,2
I/O
PA value
0b001
0b010
0b100
0b000
Freescale Semiconductor
3
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