NXP Semiconductors MPC5644A Reference Manual page 830

Microcontroller
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Enhanced Time Processing Unit (eTPU2)
The task of the Scheduler is to recognize and prioritize the channels needing service and to grant execution
time to each channel. The time given to an individual Thread for execution or service is called a Time Slot.
The duration of a time slot is determined by the number of instructions executed in the Thread plus
SPRAM wait-states received, and varies in length.
At any time, an arbitrary number of channels can require service. To request service, channel logic, eTPU
microcode or Host application notifies the Scheduler by issuing a Service Request.
24.5.3.1
Channel enabling and priority assignment
Every channel is assigned one of three priority levels—high, middle, or low—by the Host CPU, through
the Channel Configuration Register field CPR (see
Configuration
Register). These registers are also used to disable the channel, which is equivalent to
assigning it a "null" priority. In this case, the Scheduler does not grant any of its Service Requests.
It is possible to change the channel priority level or disable it dynamically. If the Host disables a channel
when it is currently being serviced, channel service thread will complete. This means that it is possible for
the output level of a channel signal to change, or a Host interrupt occur, even after its priority register was
written to "null". For instance, if an output transition is scheduled, the transition will occur even after the
channel is disabled.
Service requests previously pending or that occur while a channel is disabled remain asserted while the
channel is disabled, and are serviced if the channel is enabled again, in due time determined by the priority
scheme and concurrent requests from other channels. Channels are disabled after reset, and it is
recommended to configure a Host Service Request for initialization of a channel before that channel is
enabled to active priority (see
24.5.3.2
Channel priority schemes
The Scheduler holds a Service Grant register with one bit for each channel. Once the Scheduler grants a
time slot to channel, the Service Grant bit for that channel is asserted in the Service Grant register. When
the Service Grant bit of a channel is set, the channel may request new service but is not serviced again
before its Service Grant bit is cleared.
When all channels in a same priority level are serviced, their Service Grant bits are cleared at the end of
the thread, one system clock before the next serviced channel is calculated, according to the scheme
1
below
:
Clear all grant bits of priority High if all channels of that priority that are requesting have their grant
bits in 1.
Clear all grant bits of priority Medium if all channels of that priority that are requesting have their
grant bits in 1.
Clear all grant bits of priority Low if all channels of that priority that are requesting have their grant
bits in 1.
Clear all grant bits of disabled channels.
1. Grant bits are also cleared in the next clock, when the service channel is chosen, or when the microengine is idle, using the
same scheme.
830
Section 24.4.7.1, ETPU_CxCR – eTPU Channel x
Section 24.6, Initialization/Application
MPC5644A Microcontroller Reference Manual, Rev. 6
information).
Freescale Semiconductor

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