NXP Semiconductors MPC5644A Reference Manual page 866

Enhanced Time Processing Unit (eTPU2)
Either Match, Blocking Modes (em_b_st, em_b_dt)
In these modes the first match recognition that occurs blocks the other match recognition and generates a
service request. They end up with one service request for two programmed match recognitions where only
the first match recognition has an actual effect. If both match recognitions occur at the same time, both
MRLA and MRLB are set, before the mutual blocking takes effect.
CaptureA
load enable
MRLEA
Q
T4S
Channel
Service
IPACA[2]
MEF
sysclk
Comparator A
Trans. Event A
TS1
ucode TDL
SRI
Figure 24-40. Either Match, Blocking Modes (em_b_st, em_b_dt)
866
TCCEA
Trans.Event A
ucode ERWA
R
ucode clr
MRLEA
MRLA
Q
S
ucode
R
MRLA
T2
TDLA
Q
S
R
T2
Match A SR TransA SR TransB SR
MPC5644A Microcontroller Reference Manual, Rev. 6
Double Trans.
TS1
TS2
ucode ERWB
ucode clr
MRLEB
MRLB
Q
S
R
T2
TDLB
Q
S
R
T2
NOTE: all flip-flops but MRLE reset-dominant;
Match B SR
CaptureB
load enable
MRLEB
Q
T4S
Channel
Service
R
IPACB[2]
sysclk
Comparator B
0
1
ucode
Double Trans.
MRLB
Trans. Event B
TS2
ucode TDL
all control signals active high.
Freescale Semiconductor
MEF