Register Descriptions - NXP Semiconductors MPC5644A Reference Manual

Memory Protection Unit (MPU)
Offset from
MPU_BASE
(0xFFF1_0000)
0x0800
0x0804
0x0808
0x080C
0x0810
0x0814
0x0818
0x081C
0x0820
0x0824
0x0828
0x082C
0x0830
0x0834
0x0838
0x083C
0x0840–0x3FFF
13.4.2

Register descriptions

This section lists the MPU registers in address order and describes the registers and their bitfields.
260
Table 13-2. MPU Memory Map (continued)
Register
MPU_RGDAAC0 — MPU RGD alternate access control 0
MPU_RGDAAC1 — MPU RGD alternate access control 1
MPU_RGDAAC2 — MPU RGD alternate access control 2
MPU_RGDAAC3 — MPU RGD alternate access control 3
MPU_RGDAAC4 — MPU RGD alternate access control 4
MPU_RGDAAC5 — MPU RGD alternate access control 5
MPU_RGDAAC6 — MPU RGD alternate access control 6
MPU_RGDAAC7 — MPU RGD alternate access control 7
MPU_RGDAAC8 — MPU RGD alternate access control 8
MPU_RGDAAC9 — MPU RGD alternate access control 9
MPU_RGDAAC10 — MPU RGD alternate access control 10
MPU_RGDAAC11 — MPU RGD alternate access control 11
MPU_RGDAAC12 — MPU RGD alternate access control 12
MPU_RGDAAC13 — MPU RGD alternate access control 13
MPU_RGDAAC14 — MPU RGD alternate access control 14
MPU_RGDAAC15 — MPU RGD alternate access control 15
Reserved
MPC5644A Microcontroller Reference Manual, Rev. 6
Location
on page
13-269
on page
13-269
on page
13-269
on page
13-269
on page
13-269
on page
13-269
on page
13-269
on page
13-269
on page
13-269
on page
13-269
on page
13-269
on page
13-269
on page
13-269
on page
13-269
on page
13-269
on page
13-269
Freescale Semiconductor