NXP Semiconductors MPC5644A Reference Manual page 329

14.5.2.11.1 Misaligned access support (64 bit AMBA)
Table 14-19 shows all the misaligned access cases supported by the EBI (using a 64-bit AMBA
implementation), as seen on the internal master AMBA bus. All other misaligned cases are not supported.
If an unsupported misaligned access to the EBI is attempted (such as non-chip-select or burst misaligned
access), the EBI errors the access on the internal bus and does not start the access (nor assert TEA)
externally.
Table 14-19. Misalignment Cases Supported by a 64 bit AMBA EBI (internal bus)
Program Size and
1
No.
byte offset
1 Half @0x1,0x9
2 Half @0x3,0xB
3 Half @0x5,0xD
4 Half @0x7, 0xF
- (2 AHB transfers)
5 Word @0x1,0x9
6 Word @0x2,0xA
7 Word @0x3,0xB
8 Word @0x5,0xD
- (2 AHB transfers)
9 Word @0x6, 0xE
- (2 AHB transfers)
10 Word @0x7,0xF
11 (2 AHB transfers)
12 Doubleword
- @0x4,0x8
(2 AHB transfers)
13 Doubleword
- @0x2,0xA
(2 AHB transfers)
14 Doubleword
15 0x6,0xE
(2 AHB transfers)
1
Misaligned case number. Only transfers where HUNALIGN=1 are numbered as misaligned cases.
2
Address on internal master AHB bus, not necessarily address on external ADDR pins.
3
Internal byte strobe signals on AHB bus. Shown with Big-Endian byte ordering in this table, even though
internal master AHB bus uses Little-Endian byte-ordering (EBI flips order internally).
4
Internal signal on AHB bus; 00=8-bits, 01=16 bits, 10=32 bits, 11=64-bits. HSIZE is driven according to the
smallest aligned container that contains all the requested bytes. This results in extra EBI external transfers in
some cases.
5
Internal signal on AHB bus that indicates that this transfer is misaligned (when 1).
6
For this case, the EBI internally treats HSIZE as 00 (1-byte access).
7
For this case, the EBI internally treats HSIZE as 01 (2-byte access).
8
For this case, the EBI internally treats HSIZE as 10 (4-byte access).
Table 14-20 shows which external transfers are generated by the EBI for the misaligned access cases in
Table 14-19, for each port size.
Freescale Semiconductor
Address
Data Bus Byte Strobes
2
[29:31]
001 0110_0000
011 0001_1000
101 0000_0110
111 0000_0001
000 1000_0000
001 0111_1000
010 0011_1100
011 0001_1110
101 0000_0111
000 1000_0000
110 0000_0011
000 1100_0000
111 0000_0001
000 1110_0000
100 0000_1111
000 1111_0000
010 0011_1111
000 1100_0000
110 0000_0011
000 1111_1100
MPC5644A Microcontroller Reference Manual, Rev. 6
External Bus Interface (EBI)
3 4
HSIZE HUNALIGN
10
11
10
6
01
00
11
11
11
10
00
7
10
01
6
10
10
8
11
10
11
01
7
11
11
5
1
1
1
1
0
1
1
1
1
0
1
0
1
1
1
0
1
0
1
1
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