NXP Semiconductors MPC5644A Reference Manual page 291

Table 14-8. EBI Base Registers (EBI_BR0-EBI_BR3, EBI_CAL_BR0-3) Field Descriptions (continued)
Name
25 BL — Burst Length
BL The BL bit determines the amount of data transferred in a burst for this chip select, measured in
32-bit words. The number of beats in a burst is automatically determined by the EBI to be 4, 8, or
16 according to the Port Size (PS bit) so that the burst fetches the number of words chosen by BL.
For internal AMBA data bus width of 32-bits, the BL bit is ignored (treated as 1).
Note: The EBI does NOT support a 2-word external burst length. This means that neither a 4-beat
burst to a 16-bit external memory (nor a 2-beat burst to 32-bit external memory) are
supported.
26 WEBS — Write Enable / Byte Select
WEBS
This bit controls the functionality of the WE[0:3]/BE[0:3] signals.
1: The WE[0:3]/BE[0:3] signals function as BE[0:3]
0: The WE[0:3]/BE[0:3] signals function as WE[0:3]
27 TBDIP — Toggle Burst Data in Progress
TBDIP
This bit determines how long the BDIP signal is asserted for each data beat in a burst cycle. See
Section 14.5.2.5.1, TBDIP effect on burst transfer
1: Only assert BDIP (BSCY+1) external cycles before expecting subsequent burst data beats
0: Assert BDIP throughout the burst cycle, regardless of wait state configuration
29 SETA — Select External Transfer Acknowledge
SETA
The SETA bit controls whether accesses for this chip select will terminate (end transfer without
error) based on externally asserted TA or internally asserted TA. SETA should only be set when the
BI bit is 1 as well, since burst accesses with SETA=1 are not supported. Setting SETA=1 causes the
BI bit to be ignored (treated as 1, burst inhibited).
1: Transfer Acknowledge (TA) is an input to the EBI, data phase will be terminated by an external
device
0: Transfer Acknowledge (TA) is an output from the EBI, data phase will be terminated by the EBI
Freescale Semiconductor
1
Burst
Value PS
1
Length
3 4
0 8-word 0 (32-bit)
1 (16-bit)
1 4-word 0 (32-bit)
1 (16-bit)
1
Total amount of data fetched in a burst transfer.
2
Number of external data beats used in external burst transfer. The
size of each beat is determined by PS value.
3
An 8-word burst length is only supported for device's using 64-bit
AMBA data bus width to EBI.
4
A word always refers to 32-bits of data, regardless of PS.
MPC5644A Microcontroller Reference Manual, Rev. 6
Description
# Beats in Burst
8
16
4
8
for details.
External Bus Interface (EBI)
2
291