NXP Semiconductors MPC560xP Design Manual

Freescale Semiconductor
Design Guide
Hardware Design Guide
MPC560xP devices
1 Introduction
The MPC560xP microcontrollers are members of the 32-bit
Qorivva microcontroller family built on the Power
Architecture® technology. The devices are targeted at the
chassis and safety market segment, especially the Electrical
Hydraulic Power Steering, low end Electrical Power Steering
and Airbag applications.
The purpose of this document is to describe hardware design
considerations when developing hardware for the MPC560xP
family of microcontrollers: 5604P, 5603P, 5602P, 5601P. It
will cover topics such as clock generation, decoupling,
Voltage regulator and power considerations. Detailed
reference design schematics and descriptions of the main
components are also contained within this document. Some
general hardware recommendations are also provided.
2 Power Supply
The MPC5604P has a single main/input voltage supply which
can be either 5 V or 3.3 V with a specified tolerance of ±10%
this is converted using the internal VREG to 1.2V ±10% for
the core logic. The user is not permitted to supply the core
logic via an external 1.2 V supply, they must always use the
on-chip voltage regulator (VREG).
© 2012 Freescale Semiconductor, Inc.
Document Number: MPC560xPQRUG
Contents
1 Introduction................................................................1
2 Power Supply............................................................1
3 Clock Circuity...........................................................7
4 Analogue to Digital Convertor (ADC)......................9
5 Recommended debug connectors and
connector pin out definitions..................................11
6 MPC56xx high-speed parallel trace
connector.................................................................12
7 Minimum external circuitry....................................14
8 Example communication peripheral
connections..............................................................15
9 Pin Overview...........................................................21
Rev. 0, 2012