NXP Semiconductors PN5331B3HN Manuals

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NXP Semiconductors PN5331B3HN Manual (237 pages)

Near Field Communication (NFC) controller

Brand: NXP Semiconductors | Category: Controller | Size: 1 MB

General Description
1
Features and Benefits
3
Applications
4
Quick Reference Data
4
Ordering Information
5
Block Diagram
5
Pinning Information
6
Pinning
6
Pin Description
7
Functional Description
9
80C51
9
PN533 Memory Map
10
Data Memory
11
IDATA Memory
11
XRAM Memory
13
Program Memory
14
PCON Module
15
Interrupt Controller
15
Interrupt Vectors
15
Interrupt Enable: IE0 and IE1 Registers
16
Interrupt Prioritization: IP0 and IP1 Registers
17
General Purpose IRQ Control
19
Timer0/1 Description
20
Timer0/1 Registers
21
T01CON Register
22
T01MOD Register
23
T0L and T0H Registers
24
T1L and T1H Registers
25
Incrementer
25
Overflow Detection
26
Timer2 Description
26
Timer2 Registers
26
T2CON Register
27
T2MOD Register
28
T2L, T2H Registers
29
RCAP2L, RCAP2H Registers
29
Debug UART
30
Feature List
30
Debug UART Functional Description
30
S0CON Register
32
S0BUF Register
34
Mode 0 Baud Rate
34
Mode 2 Baud Rate
34
Mode 1 and 3 Baud Rates
35
Baud Rates Using Timer1 (Debug UART Mode 1 and 3)
35
Baud Rates Using Timer2 (Debug UART Mode 1 and 3)
37
General Purpose Ios Configurations
37
Pad Configurations Description
39
Open-Drain
39
Quasi Bidirectional
40
Input
41
Push-Pull Output
42
GPIO Registers Description
43
P7CFGA Register
43
P7CFGB Register
43
P7 Register
43
P3CFGA Register
44
P3CFGB Register
44
P3 Register
45
P5 Register
46
Host Interfaces
46
MATX Description
47
MATX Register
47
Pads NSS/P50_SCL/HSU_RX and MOSI/SDA / HSU_TX
47
C Interface
48
C Functional Description
48
Master Transmitter Mode
49
Master Receiver Mode
50
CCON Register
50
CSTA Register
54
CDAT Register
58
I 2 CADR Register
59
I 2 C_Wu_Control Register
59
FIFO Manager
60
FIFO Manager Functional Description
60
RWL Register
61
TWL Register
61
FIFOFS Register
62
FIFOFF Register
62
SFF Register
63
FIT Register
64
FITEN Register
65
FDATA Register
66
FSIZE Register
66
High Speed UART (HSU)
67
Mode of Operation
69
HSU Baud Rate Generator
69
HSU Preamble Filter
69
HSU Wake-Up Generator
69
HSU_STA Register
70
HSU_CTR Register
71
HSU_PRE Register
72
HSU_CNT Register
72
Usb
73
Features List
73
USB Interrupt
73
Resume by Host
74
Remote Wake up
75
Softconnect
76
USB Embedded Firmware View
77
Power Management
89
USB Bus Powered
89
USB Non Bus Powered
90
HOST Powered (Single Source)
90
HOST Powered (Double Source)
91
Low Power Modes
92
Power-On Reset
92
Regulator - Short Description
93
Main Switch
93
SVDD Switch
94
Power Clock and Reset Controller
95
PCR in the System
95
Mhz Crystal Oscillator
97
PLL for USB Clock Generation
97
Power-Up Sequence
98
Low Power Modes
98
Reset Modes
99
Soft-Power-Down Mode (SPD)
99
Suspend Mode
100
Remote Wake-Up
101
PCR Extension Registers
102
PCR Register Description
102
CFR Register
102
CER Register
103
ILR Register
104
PCR Control Register
105
PCR Status Register
106
Wakeupen Register
107
Contactless Interface Unit (CIU)
108
Feature List
109
Simplified Block Diagram
110
Reader/Writer Modes
111
ISO/IEC 14443A Reader/Writer
111
Felica Reader/Writer
113
ISO/IEC 14443B Reader/Writer
114
ISO/IEC 18092, ECMA 340 NFCIP-1 Operating Mode
115
ACTIVE Communication Mode
116
PASSIVE Communication Mode
117
NFCIP-1 Framing and Coding
118
NFCIP-1 Protocol Support
118
Card Operating Modes
119
ISO/IEC 14443A/MIFARE Card Operating Mode
119
Felica Card Operating Mode
121
Overall CIU Block Diagram
121
Transmitter Control
123
RF Level Detector
126
Antenna Presence Self Test
127
Principle
127
Antenna Presence Detector Register
128
Random Generator
129
Data Mode Detector
130
Serial Data Switch
131
Serial Data Switch for Driver and Loadmod
131
NFC-WI/S C Interface Support
133
Signal Shape for Felica NFC-WI/S C Interface Support
134
Signal Shape for ISO/IEC14443A and MIFARE NFC-WI/S C Support
135
NFC-WI/S C Initiator Mode
136
Hardware Support for Felica and NFC Polling
136
Polling Sequence Functionality for Initiator
136
Polling Sequence Functionality for Target
137
Additional Hardware Support for Felica and NFC
137
CRC Co-Processor
138
FIFO Buffer
138
Accessing the FIFO Buffer
138
Controlling the FIFO Buffer
138
Status Information about the FIFO Buffer
139
Ciu_Timer
140
Interrupt Request System
141
Interrupt Sources
141
CIU Power Reduction Modes
142
Hard-Power-Down
142
CIU Power-Down
142
Transmitter Power-Down
143
CIU Command Set
143
General Description
143
General Behaviour
143
Commands Overview
144
Idle Command
144
Config Command
145
Generate Randomid Command
145
Calccrc Command
145
Transmit Command
146
Nocmdchange Command
146
Receive Command
146
Transceive Command
146
Autocoll Command
147
Mfauthent Command
149
Softreset Command
149
CIU Tests Signals
150
CIU Self-Test
150
CIU Test Bus
151
Test Signals at Pin aux
152
Prbs
152
CIU Memory Map
153
CIU Register Description
155
CIU Register Bit Behaviour
155
Ciu_Sic_Clk_En Register (6330H)
155
Ciu_Command Register (D1H or 6331H)
156
Ciu_Commien Register (D2H or 6332H)
157
Ciu_Divien Register (D3H or 6333H)
157
Ciu_Commirq Register (D4H or 6334H)
158
Ciu_Divirq Register (D5H or 6335H)
159
Ciu_Error Register (D6H or 6336H)
160
Ciu_Status1 Register (Dfh or 6337H)
161
Ciu_Status2 Register (E9H or 6338H)
162
Ciu_Fifodata Register (Eah or 6339H)
163
Ciu_Fifolevel Register (Ebh or 633Ah)
163
Ciu_Waterlevel Register (Ech or 633Bh)
164
Ciu_Control Register (Edh or 633Ch)
164
Ciu_Bitframing Register (Eeh or 633Dh)
165
Ciu_Coll Register (Efh or 633Eh)
166
Ciu_Mode Register (6301H)
167
Ciu_Txmode Register (6302H)
168
Ciu_Rxmode Register (6303H)
169
Ciu_Txcontrol Register (6304H)
170
Ciu_Txauto Register (6305H)
171
Ciu_Txsel Register (6306H)
172
Ciu_Rxsel Register (6307H)
173
Ciu_Rxthreshold Register (6308H)
174
Ciu_Demod Register (6309H)
174
Ciu_Felnfc1 Register (630Ah)
175
Ciu_Felnfc2 Register (630Bh)
176
Ciu_Mifnfc Register (630Ch)
177
Ciu_Manualrcv Register (630Dh)
178
Ciu_Typeb Register (630Eh)
180
Ciu_Crcresultmsb Register (6311H)
181
Ciu_Crcresultlsb Register (6312H)
181
Ciu_Gsnoff Register (6313H)
182
Ciu_Modwidth Register (6314H)
183
Ciu_Txbitphase Register (6315H)
184
Ciu_Rfcfg Register (6316H)
185
Ciu_Gsnon Register (6317H)
186
Ciu_Cwgsp Register (6318H)
187
Ciu_Modgsp Register (6319H)
187
Ciu_Tmode Register (631Ah)
188
Ciu_Tprescaler Register (631Bh)
189
Ciu_Treload_Hi Register (631Ch)
189
Ciu_Treloadval_Lo Register (631Dh)
190
Ciu_Tcounterval_Hi Register (631Eh)
190
Register Ciu_Tcounterval_Lo (631Fh)
190
Ciu_Testsel1 Register (6321H)
191
Ciu_Testsel2 Register (6322H)
192
Ciu_Testpinen Register (6323H)
192
Ciu_Testpinvalue Register (6324H)
193
Ciu_Testbus Register (6325H)
193
Ciu_Autotest Register (6326H)
194
Ciu_Version Register (6327H)
194
Ciu_Analogtest Register (6328H)
195
Ciu_Testdac1 Register (6329H)
197
Ciu_Testdac2 Register (632Ah)
197
Ciu_Testadc Register (632Bh)
197
Ciu_Rfleveldet Register (632Fh)
198
Registers Map
199
Standard Registers
199
SFR Registers
202
Limiting Values
205
Recommended Operating Conditions
206
Thermal Characteristics
206
Voltage Regulator Characteristics
206
Characteristics
207
Power Management Characteristics
207
Current Consumption Characteristics
207
Antenna Presence Self Test Thresholds
208
Typical 27.12 Mhz Crystal Requirements
209
Pin Characteristics for 27.12 Mhz XTAL Oscillator (OSCIN, OSCOUT)
209
RSTOUT_N Output Pin Characteristics
209
RSTPD_N Input Pin Characteristics
210
Input Pin Characteristics for I0, I1 and TESTEN
210
Input/Output Characteristics for Pin P70_IRQ
210
Input/Output Pin Characteristics for P35
212
Input/Output Pin Characteristics for P30 / UART_RX, P31 / UART_TX, P32_INT0
213
P33_Int1
213
Input/Output Pin Characteristics for DP and
215
Output Pin Characteristics for Delatt
217
Input Pin Characteristics for SIGIN
217
Output Pin Characteristics for SIGOUT
217
Input Pin Characteristics for SCL
218
Input/Output Pin Characteristics for SDA
218
Input/Output Pin Characteristics for P34
218
Output Pin Characteristics for LOADMOD
218
Input Pin Characteristics for RX
219
Output Pin Characteristics for AUX1/AUX2
220
Output Pin Characteristics for TX1/TX2
221
Timing for Reset
224
Timing for the I C Interface
225
Temperature Sensor
226
Application Information
227
Package Outline
228
Abbreviations
229
Data Sheet Status
229
Revision History
230
Licenses
230
Legal Information
231
Definitions
231
Disclaimers
231
Trademarks
232
Contact Information
232

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NXP Semiconductors PN5331B3HN Manuals

NXP Semiconductors PN5331B3HN Manual (237 pages)

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