Digital Clock Domain Setup For The Digitizer - Agilent Technologies 93000 SOC Series Training Manual

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Lesson 3 – Setting up the Digitizers in the Digital Clock Domain
Digital Clock Domain Setup for the
Digitizer
The Analog Setup Tool provides the Clock Domain Setup page to
make the clock domain settings for all analog modules.
The clock domain settings are part of an analog set, like, for
example, the hardware settings.
Clock Domain Setup Parameters
The digitizers WDB and WDA which you will use for the DAC test
will be set up in the digital clock domain.
In this lesson, the WDB setup will be used as an example of how
to set up an analog module in the digital clock domain. In the lab
exercises, you will set up the WDA in exactly the same way.
The clock source is the testhead internal master clock board of
card cage 1 (512 pin testhead) or card cage 5 (1024pin testhead).
All digital channel boards and all analog modules in the digital
domain will be supplied with this clock.
The frequency of the clock generated by the master clock board is
specified in the timing setup.
The timing setup determines the master clock period p in a range
from 4ns to 10ns. The master clock frequency is distributed in the
system, however, is 2/p. All digital channels have a 'by 2' clock divider,
but the analog modules receive the master clock directly. Thus, the
master clock range for analog modules is 200MHz - 500MHz.
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