Agilent Technologies 93000 SOC Series Training Manual page 601

Mixed-signal training

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DAC transfer function

The THS5641A delivers complementary output currents IOUT1 and IOUT2. Output current IOUT1 equals the

approximate full-scale output current when all input bits are set high in mode 0 (straight binary input), i.e. the

binary input word has the decimal representation 255. For mode 1, the MSB is inverted (twos complement input

format). Full-scale output current will flow through terminal IOUT2 when all input bits are set low (mode 0,

straight binary input). The relation between IOUT1 and IOUT2 can thus be expressed as:

is the full-scale output current. The output currents can be expressed as:

where CODE is the decimal representation of the DAC data input word. Output currents IOUT1 and IOUT2 drive

resistor loads R

single-ended voltages VOUT1 and VOUT2 at terminal IOUT1 and IOUT2, respectively, of:

The differential output voltage VOUT

The latter equation shows that applying the differential output will result in doubling of the signal power delivered

to the load. Since the output currents of IOUT1 and IOUT2 are complementary, they become additive when

processed differentially. Care should be taken not to exceed the compliance voltages at node IOUT1 and

IOUT2, which would lead to increased signal distortion.

APPLICATION INFORMATION

or a transformer with equivalent input load resistance R

can thus be expressed as:

POST OFFICE BOX 655303

8-BIT, 100 MSPS, CommsDAC

DIGITAL-TO-ANALOG CONVERTER

SLAS277A –MARCH 2000 – REVISED SEPTEMBER 2002

DALLAS, TEXAS 75265

. This would translate into

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