Agilent Technologies 93000 SOC Series Training Manual page 72

Lesson 1 – Analog Modules
N O TE
N O TE
4.1G AWG
The following figure shows the block diagram of the 4.1G AWG
(WGF); the bold lines show the differential output routes of the
WGF.
The WGF is a single-slot analog module installed in the testhead.
Output Multiplexer
Pogo Pin
A+ (16/Mode1)
A- (15/Mode5)
B+ (14/Mode2)
B- (13/Mode6)
C+ (12/Mode3)
C- (11/Mode7)
D+ (10/Mode4)
D- (09/Mode8)
DGND
SYNC CLK (04)
Block Diagram of WGF (Differential Output Routes)
For the WGF, you can make a pair of differential output route(s) or
a DC route. The WGF does not support a single-ended route and
loop back route. However, the WGF can supply a single-ended
signal by using the differential route.
The WGF can make up to four differential output routes, A+&A-
pair, B+&B- pair, C+&C- pair and/or D+&D- pair. These four
differential output routes can be made simultaneously.
The non-inverse signal is supplied from the "+" pin (A+, B+, C+,
and/or D+ pins), and the inverse signal is supplied from the "-" pin
(A-, B-, C- and/or D- pins).
You can also use only a "+" pin to supply a single-ended signal to the
DUT. In this case, terminate the output of the "-" pin on the DUT
board with the same load as the "+" pin.
For other components in the AWG (attenuator, DAC, timing
generator, sequencer, and waveform memory), see the description
in "High Resolution / High Speed / 500M AWG" on page 66.
The signal generated by the WGF is in common with the digital
ground, in contrast to the other analog modules. You should
consider the several points when you design the DUT board. For
details, see "Grounding and Signal Shielding" on page
The SYNC CLK pin is also called the trigger pin.
72
Non-inverse
DAC
Attenuator
Inverse
Conversion Clock (CCLK)
Timing
CCLK Stop / Sequencer Start
Generator
Master Clock
533.
Sequencer/
Waveform
Memory