ST STM32F446 Series Reference Manual page 1213

RM0390
else if (DTERR)
{
Reset Error Count
}
The application is expected to write the requests as and when the request queue space is
available and until the XFRC interrupt is received.
•
Bulk and control IN transactions
A typical bulk or control IN pipelined transaction-level operation is shown in
See channel 2 (ch_2). The assumptions are:
–
–
–
USB on-the-go full-speed/high-speed (OTG_FS/OTG_HS)
The application is attempting to receive two maximum-packet-size packets
(transfer size = 1 024 bytes).
The receive FIFO can contain at least one maximum-packet-size packet and two
status words per packet (72 bytes for FS/520 bytes for HS).
The non-periodic request queue depth = 4.
RM0390 Rev 4
Figure 413.
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