Figure 428. A-Device Srp - ST STM32F446 Series Reference Manual

Advanced arm-based 32-bit mcus
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RM0390
1. DRV_VBUS = V
VBUS_VALID = V
A_VALID = A-peripheral V
D+ = Data plus line
D- = Data minus line
The following points refer and describe the signal numeration shown in the
1.
To save power, the application suspends and turns off port power when the bus is idle
by writing the port suspend and port power bits in the host port control and status
register.
2.
PHY indicates port power off by deasserting the VBUS_VALID signal.
3.
The device must detect SE0 for at least 2 ms to start SRP when V
4.
To initiate SRP, the device turns on its data line pull-up resistor for 5 to 10 ms. The
OTG_FS/OTG_HS controller detects data-line pulsing.
5.
The device drives V
pulsing.
The OTG_FS/OTG_HS controller interrupts the application on detecting SRP. The
session request detected bit is set in Global interrupt status register (SRQINT set in
OTG_GINTSTS).
6.
The application must service the session request detected interrupt and turn on the
port power bit by writing the port power bit in the host port control and status register.
The PHY indicates port power-on by asserting the VBUS_VALID signal.
7.
When the USB is powered, the device connects, completing the SRP process.
B-device session request protocol
The application must set the SRP-capable bit in the core USB configuration register. This
enables the OTG_FS/OTG_HS controller to initiate SRP as a B-device. SRP is a means by
which the OTG_FS/OTG_HS controller can request a new session from the host.
USB on-the-go full-speed/high-speed (OTG_FS/OTG_HS)

Figure 428. A-device SRP

drive signal to the PHY
BUS
valid signal from PHY
BUS
level signal to PHY
BUS
above the A-device session valid (2.0 V minimum) for V
BUS
RM0390 Rev 4
Figure
428:
power is off.
BUS
BUS
1259/1328
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