Otg Device Out Endpoint X Transfer Size Register (Otg_Doeptsizx) (X = 1 - ST STM32F446 Series Reference Manual

RM0390
Bit 15 USBAEP: USB active endpoint
Bits 14:11 Reserved, must be kept at reset value.
Bits 10:0 MPSIZ[10:0]: Maximum packet size
31.15.59 OTG device OUT endpoint x transfer size register
(OTG_DOEPTSIZx) (x = 1..5[FS] /8[HS],
where x = Endpoint number)
Address offset: 0xB10 + (x * 0x20)
Reset value: 0x0000 0000
The application must modify this register before enabling the endpoint. Once the endpoint is
enabled using endpoint enable bit of the OTG_DOEPCTLx registers (EPENA bit in
OTG_DOEPCTLx), the core modifies this register. The application can only read this
register once the core has cleared the endpoint enable bit.
31 30 29
RXDPID/
Res.
STUPCNT[1:0]
r/rw r/rw
15 14 13
rw rw rw
Bit 31 Reserved, must be kept at reset value.
Bits 30:29 RXDPID[1:0]: Received data PID
Indicates whether this endpoint is active in the current configuration and interface. The core
clears this bit for all endpoints (other than EP 0) after detecting a USB reset. After receiving
the SetConfiguration and SetInterface commands, the application must program endpoint
registers accordingly and set this bit.
The application must program this field with the maximum packet size for the current logical
endpoint. This value is in bytes.
28 27 26 25
rw rw rw rw
12 11 10 9
rw rw rw rw
Applies to isochronous OUT endpoints only.
This is the data PID received in the last packet for this endpoint.
00: DATA0
01: DATA2
10: DATA1
11: MDATA
USB on-the-go full-speed/high-speed (OTG_FS/OTG_HS)
24 23 22
PKTCNT
rw rw rw
8 7 6
XFRSIZ
rw rw rw
RM0390 Rev 4
21 20 19 18
rw rw rw rw
5 4 3 2
rw rw rw rw
17 16
XFRSIZ
rw rw
1 0
rw rw
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