Cec Configuration Register (Cec_Cfgr) - ST STM32F446 Series Reference Manual

HDMI-CEC controller (HDMI-CEC)
TXSOM can be also used as a status bit informing application whether any transmission request is
pending or under execution. The application can abort a transmission request at any time by clearing
the CECEN bit.
0: No CEC transmission is on-going
1: CEC transmission command
Note: TXSOM must be set when CECEN=1
TXSOM must be set when transmission data is available into TXDR
HEADER's first four bits containing own peripheral address are taken from TXDR[7:4], not from
CEC_CFGR.OAR which is used only for reception
Bit 0 CECEN: CEC Enable
The CECEN bit is set and cleared by software. CECEN=1 starts message reception and enables the
TXSOM control. CECEN=0 disables the CEC peripheral, clears all bits of CEC_CR register and aborts
any on-going reception or transmission.
0: CEC peripheral is off
1: CEC peripheral is on
32.7.2

CEC configuration register (CEC_CFGR)

This register is used to configure the HDMI-CEC controller.
Address offset: 0x04
Reset value: 0x0000 0000
Caution: It is mandatory to write CEC_CFGR only when CECEN=0.
31 30 29
LSTN
rw
15 14 13
Res. Res. Res. Res.
Bit 31 LSTN: Listen mode
LSTN bit is set and cleared by software.
0: CEC peripheral receives only message addressed to its own address (OAR). Messages
addressed to different destination are ignored. Broadcast messages are always received.
1: CEC peripheral receives messages addressed to its own address (OAR) with positive
acknowledge. Messages addressed to different destination are received, but without interfering with
the CEC bus: no acknowledge sent.
Bits 30:16 OAR: Own addresses configuration
The OAR bits are set by software to select which destination logical addresses has to be considered in
receive mode. Each bit, when set, enables the CEC logical address identified by the given bit position.
At the end of HEADER reception, the received destination address is compared with the enabled
addresses. In case of matching address, the incoming message is acknowledged and received. In
case of non-matching address, the incoming message is received only in listen mode (LSTN=1), but
without acknowledge sent. Broadcast messages are always received.
Example:
OAR = 0b000 0000 0010 0001 means that CEC acknowledges addresses 0x0 and 0x5.
Consequently, each message directed to one of these addresses is received.
Bits 15:9 Reserved, must be kept at reset value.
1276/1328
28 27 26 25
12 11 10 9
Res. Res. Res.
24 23 22
OAR[14:0]
rw
8 7 6
SFT LBPE
BRDN
OGEN
OPT GEN
rw rw rw
RM0390 Rev 4
21 20 19 18
5 4 3 2
BRE BRE RX
GEN STP TOL
rw rw rw
RM0390
17 16
1 0
SFT[2:0]
rw