Sft Option Bit; Figure 437. Arbitration Phase; Figure 438. Sft Of Three Nominal Bit Periods - ST STM32F446 Series Reference Manual

Advanced arm-based 32-bit mcus
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RM0390
The
Figure 438
A configurable time window is counted before starting the transmission.
In the SFT=0x0 configuration the HDMI-CEC device performs automatic SFT calculation
ensuring compliance with the HDMI-CEC Standard:
2.5 data bit periods if the CEC is the last bus initiator with unsuccessful transmission
4 data bit periods if the CEC is the new bus initiator
6 data bit periods if the CEC is the last bus initiator with successful transmission
This is done to guarantee the maximum priority to a failed transmission and the lowest one
to the last initiator that completed successfully its transmission.
Otherwise there is the possibility to configure the SFT bits to count a fixed timing value.
Possible values are 0.5, 1.5, 2.5, 3.5, 4.5, 5.5, 6.5 data bit periods.
32.4.1

SFT option bit

In case of SFTOPT=0 configuration SFT starts being counted when the start-of-
transmission command is set by software (TXSOM=1).
In case of SFTOPT=1, SFT starts automatically being counted by the HDMI-CEC device
when a bus-idle or line error condition is detected. If the SFT timer is completed at the time
TXSOM command is set then transmission starts immediately without latency. If the SFT

Figure 437. Arbitration phase

shows an example for a SFT of three nominal bit periods

Figure 438. SFT of three nominal bit periods

RM0390 Rev 4
HDMI-CEC controller (HDMI-CEC)
1269/1328
1283

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