ST STM32F446 Series Reference Manual page 1209

Advanced arm-based 32-bit mcus
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RM0390
1.
Initialize channel 1
2.
Write the first packet for channel 1
3.
Along with the last word write, the core writes an entry to the non-periodic request
queue
4.
As soon as the non-periodic queue becomes non-empty, the core attempts to send an
OUT token in the current frame
5.
Write the second (last) packet for channel 1
6.
The core generates the XFRC interrupt as soon as the last transaction is completed
successfully
7.
In response to the XFRC interrupt, de-allocate the channel for other transfers
8.
Handling non-ACK responses
USB on-the-go full-speed/high-speed (OTG_FS/OTG_HS)
RM0390 Rev 4
1209/1328
1264

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