USB on-the-go full-speed/high-speed (OTG_FS/OTG_HS)
1. V
range is between 2 V and 3.6 V.
DD
31.7.1
SRP-capable host
SRP support is available through the SRP capable bit in the global USB configuration
register (SRPCAP bit in OTG_GUSBCFG). With the SRP feature enabled, the host can
save power by switching off the V
The SRP host mode program model is described in detail in the
protocol) section.
31.7.2
USB host states
Host port power
On-chip 5 V V
available on the application board, a basic power switch, must be added externally to drive
the 5 V V
2
I
C interface connected to an external PMIC (power management IC). When the application
decides to power on V
status register (PPWR bit in OTG_HPRT).
V
valid
BUS
When HNP or SRP is enabled the VBUS sensing pin should be connected to V
V
input ensures that valid V
BUS
operations. Any unforeseen V
to an OTG interrupt triggered by the session end detected bit (SEDET bit in
OTG_GOTGINT). The application is then required to remove the V
port power bit.
When HNP and SRP are both disabled, the VBUS sensing pin does not need to be
connected to V
The charge pump overcurrent flag can also be used to prevent electrical damage. Connect
the overcurrent flag output from the charge pump to any GPIO input and configure it to
generate a port interrupt on the active level. The overcurrent ISR must promptly disable the
V
generation and clear the port power bit.
BUS
1092/1328
Figure 404. USB_FS host-only connection
generation is not supported. For this reason, a charge pump or, if 5 V are
BUS
line. The external charge pump can be driven by any GPIO output or via an
BUS
, it must also set the port power bit in the host port control and
BUS
BUS
.
BUS
power while the USB session is suspended.
BUS
levels are supplied by the charge pump during USB
BUS
voltage drop below the V
RM0390 Rev 4
A-device session request
BUS
valid threshold (4.4 V) leads
BUS
power and clear the
BUS
RM0390
. The
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