A/D Control Status Register Upper (Adcsh); Fig. 19.4 A/D Control Status Register Higher (Adcsh) - Fujitsu MB90420/5 (A) Series Hardware Manual

19.4.1 A/D Control Status Register Upper (ADCSH)

The A/D control status register higher (ADCSH) defines starting by using software, selects the start trigger,
enables/disables interrupt request, checks state of interrupt request, and checks during pause and
conversion.
n A/D control status register higher (ADCSH)
Address bit 15 bit 14 bit 13 bit1 2 bit 11 bit 10 bit 9 bit 8 bit 7
000021
BUSY INT
H
R/W R/W R/W R/W R/W R/W
R/W : Both read and write
W : Write only
— : Unused
: Initial value
8-/10-BIT A/D CONVERTER
INTE PAUS STS1 STS0 STRT RESV
RESV
A/D Conversion Start Bit (This bit is enabled only when a start is made by
STRT
0 Does not start A/D conversion
1 Starts A/D conversion
STS1 STS0
0 0 Starts by software
0 1 Starts by external pin trigger or by software
1 0 Starts by timer or software
1 1 Starts by external pin trigger, timer, or software
PAUS Pause Flag Bit (This bit is enabled only when EI
0 Indicates A/D conversion does not pause
1 Indicates A/D conversion pauses
INTE
Disables output of interrupt requests
0
Enables output of interrupt requests
1
INT
0 Indicates A/D conversion not ended
1 Indicates A/D conversion ended
BUSY
0 Indicates A/D conversion pauses
Indicates A/D conversion currently
1
being performed

Fig. 19.4 A/D Control Status Register Higher (ADCSH)

(ADCSL)
W R/W
Reserved Bit
Always write 0 to this bit.
software (ADC2: EXT = 0.)
A/D Start Factor Select Bits
Interrupt Request Enable Bit
Interrupt Request Flag Bit
At Read
Conversion-in-progress Indication Bit
At Read
Forcibly stops A/D conversion
Does not change this bit and does not
affect other bits
19-9
bit 0 Initial value
00000000
2
OS is used.)
At Write
Clears this bit
Does not change this bit and does not
affect other bits
At Write
B