Precautions At Using 16-Bit Reload Timer - Fujitsu MB90420/5 (A) Series Hardware Manual

F2mc-16lx family 16-bit microcontrollers
Table of Contents

Advertisement

MB90420/5 (A) SERIES F

10.7 Precautions at Using 16-bit Reload Timer

Precautions at using the 16-bit reload timer are given below.
n Precautions at using 16-bit reload timer
• Precautions for setting by program
– Write to the 16-bit reload register (TMRLR0/1L, TMRLR0/1H) when the counter is stopped
(TMCSR0/1L, TMCSR0/1H). The 16-bit timer register (TMR0/1) can be read during counting, but
always use a word transfer instruction (such as MOVW A, dir).
– Change the CSL1 and CSL0 bits of the timer control status register (TMCSR0/1L, TMCSR0/1H) when
the counter is stopped (TMCSR0/1: CNTE = 0).
• Precautions for interrupt
– No return can be performed from interrupt handling when the UF bit of the timer control status register
(TMCSR0/1L, TMCSR0/1H) is 1 and the interrupt request is already enabled (TMCSR0/1: INTE = 1).
To return from interrupt handling, always clear the UF bit.
– Since the 16-bit reload timer shares an interrupt vector with the watch timer, when using the interrupt,
precautions must be taken, such as checking the interrupt factor with the interrupt-processing routine.
Also, when the 16-bit reload timer uses the EI
2
MC-16LX FAMILY 16-BIT MICROCONTROLLERS HARDWARE MANUAL
2
OS, the interrupt of the watch timer must be disabled.
10-24

Advertisement

Table of Contents
loading

Table of Contents