Fig. 6.3 Interrupt Control Register (Icr00 To Icr15) At Reading - Fujitsu MB90420/5 (A) Series Hardware Manual

F2mc-16lx family 16-bit microcontrollers
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<At read>
MSB
Address
0000B0
to
H
0000BF
H
MSB : Most Significant Bit
LSB
: Least Significant Bit
: Unused
: Initial value

Fig. 6.3 Interrupt Control Register (ICR00 to ICR15) at Reading

INTERRUPT
S1
S0
ISE
IL2
IL2
IL1
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
ISE
0
The interrupt sequence is started at an interrupt.
2
1
EI
OS is started at an interrupt.
S1
S0
0
0
0
1
1
0
1
1
6-9
LSB
Initial value
--000111
IL1
IL0
IL0
Interrupt Level Setting Bit
0
Interrupt level 0 (highest)
1
0
1
0
1
0
1
Interrupt level 7 (no interrupt)
2
EI
OS Enable Bit
2
EI
2
When EI
OS in operation or not started
Stop state by end of counting
Reserved
Stop state by request issued from resource
B
OS Status

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