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MB90420/5 (A) SERIES F
Note:
Even when the MCS bit or SCS bit of the CKSCR is rewritten, the machine clock is not switched
immediately. When operating a resource that is dependent on the machine clock, make sure that
the machine clock is switched by referencing the MCM bit or SCS bit of the CKSCR.
When the SCS bit and the MCS bit are both 0, the SCS bit is preferred, causing the sub-clock mode.
n Selection of PLL clock multiplication rate
When one of 00
to 11
B
can be selected from the four different rates (multiply-by-1 to multiply-by-4)
2
MC-16LX FAMILY 16-BIT MICROCONTROLLERS HARDWARE MANUAL
is written to the CS1 bit and CS0 bit of the CKSCR, one PLL clock multiplication rate
B
4-10
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