Id Register X (X = 0 To 15) (Idrx) - Fujitsu MB90420/5 (A) Series Hardware Manual

MB90420/5 (A) SERIES F

23.6.21 ID Register x (x = 0 to 15) (IDRx)

ID register x (x = 0 to 15) (IDRx) is the ID register for message buffer (x).
n ID register x (x = 0 to 15) (IDRx)
BYTE0
Address: 003A20 +4x (CAN0)
H
Address: 003B20 +4x (CAN1)
H
Read/write →
Initial value →
BYTE1
Address: 003A21 +4x (CAN0)
H
Address: 003B21 +4x (CAN1)
H
Read/write →
Initial value →
BYTE2
Address: 003A22 +4x (CAN0)
H
Address: 003B22 +4x (CAN1)
H
Read/write →
Initial value →
BYTE3
Address: 003A23 +4x (CAN0)
H
Address: 003B23 +4x (CAN1)
H
Read/write →
Initial value →
When using the message buffer (x) in the standard frame format (IDEx of the IDE register (IDER) = 0), use
11 bits of ID28 to ID18. When using the buffer in the extended frame format (IDEx = 1), use 29 bits of ID28
to ID0.
• ID28 to ID0 have the following functions:
– Set acceptance code (ID for comparing with the receive message ID).
– Set transmit message ID.
Note: In the standard frame format, setting 1 to all bits of ID28 to ID22 is prohibited).
– Store the received message ID.
Note: All receive message ID bits are stored (even if bits are masked). In the standard frame format,
ID17 to ID0 stores the undifined value (part of the previous-received message).
Notes: • A write operation to this register should be performed in word unit. A write operation in byte unit
causes undefined data to be written to the upper byte at writing to the lower byte. Writing to the
upper byte is ignored.
• This register should be set when the message buffer (x) is invalid (BVALx of the message buffer
valid register (BVALR) is 0). Setting when the buffer is valid (BVALx = 1) may cause unnecessary
receive messages to be stored.
2
MC-16LX FAMILY 16-BIT MICROCONTROLLERS HARDWARE MANUAL
7 6 5
ID28 ID27 ID26
(R/W) (R/W) (R/W)
(X) (X) (X)
15 14 13
ID20 ID19 ID18
(R/W) (R/W) (R/W)
(X) (X) (X)
7 6 5
ID12 ID11 ID10
(R/W) (R/W) (R/W)
(X) (X) (X)
15 14 13
ID4 ID3 ID2
(R/W) (R/W) (R/W)
(X) (X) (X)
23-28
4 3 2
ID25 ID24 ID23
(R/W) (R/W) (R/W)
(X) (X) (X)
12 11 10
ID17 ID16 ID15
(R/W) (R/W) (R/W)
(X) (X) (X)
4 3 2
ID9 ID8 ID7
(R/W) (R/W) (R/W)
(X) (X) (X)
12 11 10
ID1 ID0 —
(R/W) (R/W) (—)
(X) (X) (—)
← Bit No.
1 0
ID22 ID21
(R/W) (R/W)
(X) (X)
← Bit No.
9 8
ID14 ID13
(R/W) (R/W)
(X) (X)
← Bit No.
1 0
ID6 ID5
(R/W) (R/W)
(X) (X)
← Bit No.
9 8
— —
(—) (—)
(—) (—)