Event Count Mode; Fig. 10.17 Count Operation In Reload Mode (Operation Of Event Count Mode) - Fujitsu MB90420/5 (A) Series Hardware Manual

MB90420/5 (A) SERIES F

10.6.3 Event Count Mode

The input edge from the TIN pin is counted and decrement of the 16-bit counter is performed. An interrupt
request is issued to the CPU by a counter underflow. Also, toggle waves or rectangular waves can be output
from the TOT0/1 pin.
n Event count mode
When the count operation is enabled (TMCSR0/1: CNTE = 1) and the counter is started (TMCSR0/1: TRG
= 1), the value of the 16-bit reload register (TMRLR0/1L, TMRLR0/1H) is loaded into the counter, and
decrementing is performed each time the effective edge (rising edge, falling edge, or both edges) of the
pulse (external count clock) input to the TIN0/1 pin is detected. When the count enable bit and the software
trigger bit are set to 1 concurrently, the count is started at the same time as the count enabling.
• Operation in reload mode
When the counter value underflows (0000
TMRLR0/1H) is loaded into the counter and the count continues. An interrupt request is issued at this
point when the underflow interrupt request flag bit (UF) is 1 and the interrupt request enable bit
(TMCSR0/1: INTE) is 1. Also, toggle waves that are inverted each time an underflow occurs can be
output from the TOT0/1 pin. Figure 10.17 shows the count operation in the reload mode.
TIN pin
Counter
Data load signal
UF bit
CNTE bit
TRG bit
TO pin
T : Machine cycle
* : It takes 1 T time from inputting the trigger to loading the reload data.

Fig. 10.17 Count Operation in Reload Mode (Operation of Event Count Mode)

Note: The width of the H or L in clock input to the TIN0/1 pin must be 4/φ or more.
2
MC-16LX FAMILY 16-BIT MICROCONTROLLERS HARDWARE MANUAL
→ FFFF
H
Reload Reload
–1 0000
H
data data
T*
), the value of the 16-bit reload register (TMRLR0/1L,
H
Reload
–1 0000 –1
H
data
10-22
Reload
0000 –1
H
data