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WATCHDOG TIMER/TIME-BASE TIMER/WATCH TIMER (SUB-CLOCK)
9.5 Precautions at Using Watchdog Timer and Time-base Timer
The precautions for using the watchdog timer and the effect on the resources by clearing the interrupt
request at using time-base timer and by clearing the time-base timer are described below.
n Precautions at using watchdog timer
• Stop of watchdog timer
The watchdog timer stops by all reset factors.
• Interval time
The watchdog timer interval time uses the carrying-up signal of the time-base timer or watch timer as the
count clock, so the interval time may become longer than the setting when the counter of each clock
source is cleared.
• Selection of interval time
The interval time can be set at start of the watchdog timer. Data written at any other time is ignored.
• Precautions at creating a program
When creating a program such as one that repetitively clears the watchdog timer within the main loop, the
processing time of the main loop including interrupt handling must be less than the minimum interval time
of the watchdog timer.
• Operation of watchdog timer during time-base timer mode
During the time-base timer mode, the time-base timer is operating, but the watchdog timer stops.
n Precautions at using time-base timer
• Clear of interrupt request
Clear the TBOF of the time-base timer control register when the TBIE bit or the interrupt level mask
register (ILM) of the processor status (PS) masks the time-base timer interrupt.
• Influence of clearing time-base timer
Clearing the time-base timer counter influences the following operations.
– When using interval timer function (interval interrupt) of time-base timer
– When using watchdog timer
• Use of time-base timer for oscillation stabilization wait time
At power-on and during the main stop mode, the original oscillation of the main clock is stopped, so the
oscillation stabilization wait time for the main clock is taken with the operating clock supplied by the time-
base timer after the oscillator starts the operation. An appropriate oscillation stabilization wait time must be
selected according to the type of oscillator connected to the main clock. For details, see Section 4.5.
• Note on resources supplied clock from time-base timer
In the mode in which the main clock original oscillation is stopped, the counter is cleared and the time-base
timer stops. When the counter of the time-base timer is cleared, the clock from the time-base timer is
supplied in the initial state, so the H level may be shortened or the L level may be lengthened by 1/2 cycle
max. The clock for the watchdog timer is also supplied in the initial state, but the watchdog timer operates
at the normal cycle because the counter for the watchdog timer is cleared simultaneously.
9-17
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