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This chapter explains the operation mode and memory access mode.
7.1 Mode Setting
2
The F
MC-16LX has various modes for access type and access area. Each mode is set according to the
mode pin setting at reset and fetched mode data.
n Mode setting
2
The F
MC-16LX has various modes for access type and access area. In this module, they are classified as
follows.
Operation mode
¡ RUN mode
¡ FLASH writing mode
n Operation mode
The operation mode controls the operation state of the device, and is specified by the mode setting pins
(MDx) and value of Mx bit in the mode data. By selecting the operation mode, the normal operation can be
started.
Note: In the MB90420/5 (A) series, only the single-chip mode is used, so set MD2, MD1, and MD0 to 011,
and set M1 and M0 to 00.
n Bus mode
The bus mode controls the operation of the internal ROM and external access functions, and is specified by
the mode setting pins (MDx) and the value of Mx bit in mode data. The mode setting pins (MDx) specify the
bus mode when the reset vectors and mode data are read; Mx bit in the mode data specifies the bus mode
at normal operation.
n RUN mode
RUN mode refers to the CPU operation mode. The RUN mode includes various low power consumption
modes in addition to the main clock mode and PLL clock mode. For details, see Chapter 5.
Note:
In the MB90420/5 (A) series, only the single-chip mode is used, so set MD2, MD1, and MD0 to 011,
and set M1 and M0 to 00.
MODE SETTING
Single-chip mode
Fig. 7.1 Classification of Mode
7-3
Bus mode
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