Table Of Contents - Fujitsu MB90420/5 (A) Series Hardware Manual

Chapter 1 General ................................................................................................................ 1-1
1.1 Overview of Product .................................................................................................................. 1-3
1.2 Features ...................................................................................................................................... 1-4
1.3 Block Diagram............................................................................................................................ 1-6
1.4 Package Dimension ................................................................................................................... 1-7
1.5 Pin Assignment .......................................................................................................................... 1-9
1.6 Pin Description......................................................................................................................... 1-11
1.7 I/O Circuits ................................................................................................................................ 1-14
1.8 Notes on Handling Devices..................................................................................................... 1-16
Chapter 2 CPU ...................................................................................................................... 2-1
2.1 CPU.............................................................................................................................................. 2-3
2.2 Memory Space............................................................................................................................ 2-4
2.3 Memory Map ............................................................................................................................... 2-6
2.4 Addressing ................................................................................................................................. 2-7
2.4.1 Linear Type Addressing................................................................................................. 2-8
2.4.2 Bank Type Addressing................................................................................................... 2-9
2.5 Allocation of Multi-byte Length Data on Memory................................................................. 2-11
2.6 Register..................................................................................................................................... 2-13
2.7 Dedicated Registers ................................................................................................................ 2-14
2.7.1 Accumulator (A)............................................................................................................ 2-16
2.7.2 Stack Pointer (USP, SSP)............................................................................................. 2-19
2.7.3 Processor Status (PS).................................................................................................. 2-21
2.7.4 Condition Code Register (PS: CCR) .......................................................................... 2-22
2.7.5 Register Bank Pointer (PS: RP) ................................................................................. 2-23
2.7.6 Interrupt Level Mask Register (PS: ILM) ................................................................... 2-24
2.7.7 Program Counter (PC).................................................................................................. 2-25
2.7.8 Direct Page Register (DPR) ......................................................................................... 2-26
2.7.9 Bank Register (PCB, DTB, USB, SSB, and ADB) ...................................................... 2-27
2.8 General-purpose Register....................................................................................................... 2-28
2.9 Prefix Codes ............................................................................................................................. 2-30
2.9.1 Bank Select Prefix (PCB, DTB, ADB, and SPB) ......................................................... 2-31
2.9.2 Common Register Bank Prefix (CMR) ........................................................................ 2-32
2.9.3 Flag Change Inhibit Prefix (NCC) ................................................................................ 2-33
2.9.4 Restrictions on Prefix Code ........................................................................................ 2-34
Chapter 3 Reset.................................................................................................................... 3-1
3.1 Overview of Reset...................................................................................................................... 3-3
3.2 Reset Factors and Oscillation Stabilization Wait Time.......................................................... 3-5
3.3 External Reset Pin ..................................................................................................................... 3-7
3.4 Reset Operation ......................................................................................................................... 3-8
3.5 Reset Factor Bit ....................................................................................................................... 3-10
3.6 State of Each Pin at Reset....................................................................................................... 3-12
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