• Delay of the effect of the prefix code
As shown in Figure 2.29, when the interrupt/hold inhibit instruction is prefixed by the prefix code, the effect
of the prefix code is effective for the first instruction after the interrupt/hold inhibit instruction.
MOV A, FF
NCC
H
CCR: XXX10XX
B
Fig. 2.29 Interrupt/hold Inhibition Instruction and Prefix Code
n Successive prefix codes
As shown in Figure 2.30, when some conflicting prefix codes (PCB, ADB, DTB, SPB) are successive, the
last one is effective.
• • •
CPU
Interrupt/hold inhibit instruction
MOV ILM, #imm8
Prefix codes
ADB
DTB
Fig. 2.30 Successive Prefix Codes
• • • •
CCR is not changed by the NCC.
PCB
ADD A, 01
H
Prefix code, PCB is valid
2-35
ADD A, 01
CCR: XXX10XX
B
• • •
H