State Transition Diagram; Fig. 5.8 State Transition Diagram - Fujitsu MB90420/5 (A) Series Hardware Manual

5.6 State Transition Diagram

The transition diagram of operation state and transition condition of the MB90420/5 (A) series are shown.
n State transition diagram
Lowering of power
supply voltage
Power-on
Low-voltage
Power On Reset
detection reset
End of oscillation
stabilization wait
End of oscillation
stabilization wait
Main clock mode
SLP = 1
Main sleep mode
TMD = 0
Time-base timer mode
STP = 1
Main stop mode
interrupt
Main clock oscillation
stabilization wait
LOW-POWER CONSUMPTION MODE
External reset, watchdog timer reset, CPU
operation detection reset or software reset
Reset
MCS = 0
MCS = 1
interrupt
SLP = 1
interrupt
TMD=0
Time base timer mode
STP = 1
End of oscillation
stabilization wait

Fig. 5.8 State Transition Diagram

SCS = 1
SCS = 0
SCS = 0
PLL clock mode
SCS = 1
interrupt
PLL sleep mode
interrupt
PLL stop mode
End of oscillation
interrupt
stabilization wait
PLL clock oscillation
stabilization wait
5-19
Sub-clock
mode
interrupt
SLP = 1
Sub-sleep mode
interrupt
TMD = 0
Timer mode
STP = 1
Sub-stop
mode
End of oscillation
interrupt
stabilization wait
Sub-clock oscillation
stabilization wait