Registers For Port 1 (Pdr1, Ddr1) - Fujitsu MB90420/5 (A) Series Hardware Manual

8.4.1 Registers for Port 1 (PDR1, DDR1)

The registers for port 1 are explained.
n Function of registers for port 1
• Port 1 data register (PDR1)
The PDR1 register indicates the state of the pins.
• Port 1 direction register (DDR1)
The DDR1 register sets the I/O direction of the pins for each bit. When the bit corresponding to a port pin
is set to 1, the port pin becomes an output port pin; when the bit corresponding to a port pin is set to 0, the
port pin becomes an input port pin.
• When using a resource with an output pin when the output enable bit of each resource that
Note:
corresponds to the pin is set, the pin is forcibly set as an output pin of the resource, irrespective of
the value of the DDR1 register.
• When using a resource with input pins, write 0 to the bits of the DDR1 register that correspond to
the input pins of the resource, to set those input pins as input ports.
Register
Data
Name
0
Port 1 data
register
(PDR1)
1
0
Port 1
direction
register
(DDR1)
1
R/W : Both read and write
X : Undefined
Table 8-9 Function of Registers for Port 1
At Read
0 is set for the output latch, and
The pin state
when the pin is an output port pin,
is L level.
the L level is output to the pin.
1 is set for the output latch, and
The pin state
when the pin is an output port pin,
is H level.
the H level is output to the pin.
The output buffer is set to OFF,
The direction
and the pin becomes an input
latch is 0.
port pin.
The output buffer is set to ON,
The direction
and the pin becomes an output
latch is 1.
port pin.
I/O PORT
At Write
8-13
Read/
Address Initial Value
Write
R/W 000001 XXXXXXXX
H
R/W 000011 00000000
H
B
B