Fig. 12.15 Transmit Data When Parity Enabled - Fujitsu MB90420/5 (A) Series Hardware Manual

MB90420/5 (A) SERIES F
• Error detection
– In operation mode 0, parity, overrun, and frame errors can be detected.
– In operation mode 1, overrun and frame errors can be detected, but parity errors cannot be detected.
• Parity 0
Parity can only be used for operation mode 0 (asynchronous, normal mode). Whether parity is provided or
not is set by the PEN bit of the control register (SCR0/1), and even or odd parity is set by the P bit. No
parity can be used in operation mode 1 (asynchronous, multiprocessor mode) and operation mode 2
(synchronous, normal mode). Figure 12.15 shows transmission/reception when parity is enabled.
SIN0/1
SOT0/1
SOT0/1
ST : Start bit
SP : Stop bit
Note: Parity cannot be used in operation modes 1 and 2.
2
MC-16LX FAMILY 16-BIT MICROCONTROLLERS HARDWARE MANUAL
ST
1 0 1
ST
1 0 1
ST
1 0 1
Data

Fig. 12.15 Transmit Data when Parity Enabled

SP
1 0 0 0
SP
1 0 0 1
SP
1 0 0 0
Parity
12-30
Parity error at reception by
even parity
(SCR0/1: P = 0)
Transmission of even parity
(SCR0/1: P = 0)
Transmission of odd parity
(SCR0/1: P = 1)