Fujitsu MB90420/5 (A) Series Hardware Manual page 153

F2mc-16lx family 16-bit microcontrollers
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2
n EI
OS status register (ISCS)
2
The EI
OS status register (ISCS) is 8-bit length and indicates the updating/fixing of the buffer address pointer
and the I/O register address pointer, the transfer data format (byte/word), and the transfer direction. Figure
6.16 shows the configuration of ISCS.
bit 7
bit 6
bit 5
RESV RESV RESV
R/W
R/W
R/W
R/W : Both read and write
X
: Undefined
*1
: The buffer address pointer changes only in lower 16 bits, and can only be incremented.
*2
: The address pointer can only be incremented.
bit 4
bit 3
bit 2
bit 1
IF
BW
BF
DIR
R/W
R/W
R/W
R/W
SE
0
1
DIR
0
1
BF
0
1
BW
0
1
IF
0
1
RESV
Always write 0 to these bits.
Fig. 6.16 Configuration of EI
INTERRUPT
Initial value
bit 0
SE
XXXXXXXX
B
R/W
2
EI
OS Termination Control Bit
2
EI
OS is not terminated by a request from resource.
2
EI
OS is terminated by a request from resource.
Data Transfer Direction Specification Bit
I/O Register address pointer → Buffer address pointer
Buffer address pointer → I/O register address pointer
BAP Updating/Fixing Selection Bit
Buffer address pointer is updated after data transfer.*
Buffer address pointer is not updated after data transfer.
Transfer Data Length Specification Bit
Byte
Word
IOA Updating/Fixing Selection Bit
I/O Register address pointer is updated after data transfer.*
I/O Register address pointer is not updated after data transfer.
2
OS Status Register (ISCS)
6-27
Reserved Bit
1
2

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