Fig. 21.5 Rom Correction Processing Flow Diagram - Fujitsu MB90420/5 (A) Series Hardware Manual

FFFF
H
0090
H
0010
H
Program address lower: 00
0003
H
Program address middle: 00
0002
H
Program address higher: 00
0001
H
Byte count of patch program: 80
0000
H
n INT9 interrupt
In the interrupt routine, the address at which the interrupt is generated is checked by interrupt flag, and the
result is branched to the correspoinding program. The information stacked during interrupt will be discarded.
ROM CORRECTION
2
E PROM
Patch program

Fig. 21.5 ROM Correction Processing Flow Diagram

FFFFFF
H
FF0050
H
ROM
Erroneous program
FF0000
H
FE0000
H
001100
H
000480
H
RAM
000400
H
RAM/register area
000100
H
000000
H
21-9
MB90427
Stack area
RAM area
Patch program
I/O area