Request Level Setting Register (Elvr); Fig. 16.6 Request Level Setting Register (Elvr); Table 16-7 Function Of Each Bit Of Request Level Setting Register (Elvr) - Fujitsu MB90420/5 (A) Series Hardware Manual

MB90420/5 (A) SERIES F

16.4.3 Request Level Setting Register (ELVR)

The request level setting register (ELVR) selects (for each pin) the level or edge type of the signal for
detecting that the signal that is input to the DTP/external interrupt pin is a DTP/external interrupt factor.
n Request level setting register (ELVR)
Address
bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9
000033
LB7 LA7
H
R/W R/W
R/W : Both read and write
: Initial value

Table 16-7 Function of Each Bit of Request Level Setting Register (ELVR)

Bit Name
bit 15 LB7/LA7 to
bit 14 LB0/LA0:
bit 13
Request
bit 12
detection select
bit 11
bits
bit 10
bit 9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 6
bit 2
bit 1
bit 0
2
MC-16LX FAMILY 16-BIT MICROCONTROLLERS HARDWARE MANUAL
LB6 LA6 LB5 LA5
R/W R/W R/W R/W
LB7 to
LB0
0
0
1
1

Fig. 16.6 Request Level Setting Register (ELVR)

• These bits select the level or the edge type of the signal that is input to the
DTP/external interrupt pin and that is a DTP/external interrupt factor.
• Each pin is assigned 2 bits.
Note: When the selected detection signal is input to the DTP/external interrupt pin, 1 is
set at the external interrupt request flag bit irrespective of the setting of the
DTP/interrupt enable register (ENIR), etc.
bit 8 bit 7 bit 6
LB4 LA4 LB3 LA3
R/W R/W R/W R/W
LA7 to
External Interrupt Request Detection Setting Bits
LA0
0 Detects L level
1 Detects H level
0 Detects rising edge
1 Detects falling edge
Function
16-10
bit 5 bit 4 bit 3 bit 2
LB2 LA2 LB1 LA1
R/W R/W R/W R/W
Initial value
bit 1 bit 0
00000000
LB0 LA0
H
R/W R/W 00000000
H