Sleep Mode - Fujitsu MB90420/5 (A) Series Hardware Manual

MB90420/5 (A) SERIES F

5.5.1 Sleep Mode

The sleep mode stops the CPU operation clock and everything ecept the CPU continues operating.
If a transition to the sleep mode is specified using the LPMCR, when the PLL clock mode is already
specified, a transition is performed to the PLL sleep mode. If a transition to the sleep mode is specified
using the LPMCR, when the main clock mode is already specified, a transition is performed to the main
sleep mode. If a transition to the sleep mode is specified using the LPMCR, when the sub-clock mode is
already specified, a transition is performed to the sub-sleep mode.
n Transition to sleep mode
A transition is performed to the sleep mode when 1, 1, and 0 are written to the SLP, TMD, and STP of the
LPMCR, respectively.
In this case, a transition is performed to the PLL sleep mode when the clock select register (CKSCR) is MCS
= 0, SCS = 1, a transition is performed to the main sleep mode when the MCS = 1, SCS = 1 and a transition
is performed to the sub-sleep mode when the SCS = 0.
Note: When 1 is written simultaneously to the SLP and the STP bits, the STP is preferred, transiting to the
stop mode. When 1 is written to the SLP and 0 is written to the TMD simultaneously, the TMD is
preferred, transiting to the time-base timer or the timer mode.
• Data hold function
In the sleep mode, data in the dedicated registers such as accumulators and internal RAM are stored.
• Hold function
In the sleep mode, the external bus hold function operates; the hold state occurs when a hold request is
issued.
• Operation during interrupt request issuance
When 1 is written to the SLP bit of the LPMCR and an interrupt request is already issued, a transition to
the sleep mode is not performed. Consequently, in a state in which the interrupt is not accepted, the CPU
executes the next instruction; in a state in which the interrupt is accepted, the CPU immediately performs a
branch to the interrupt-processing routine.
• Pin state
In the sleep mode, pins except those used as bus I/O pins or bus control pins hold their immediately
preceding states.
2
MC-16LX FAMILY 16-BIT MICROCONTROLLERS HARDWARE MANUAL
5-12