Table 12-5 Function Of Each Bit Of Control Register (Scr0/1) - Fujitsu MB90420/5 (A) Series Hardware Manual

Table 12-5 Function of Each Bit of Control Register (SCR0/1)

Bit Name
bit 15 PEN:
Parity enable bit
bit 14 P:
Parity select bit
bit 13 SBL:
Stop-bit length
select bit
bit 12 CL:
Data-length
select bit
bit 11 A/D:
Address/data
select bit
REC:
bit 10
Receive error flag
clear bit
bit 9 RXE:
Receive enable
bit
bit 8 TXE:
Transmit enable
bit
Bit to select whether to add parity bit (at sending) at serial-data I/O, and whether to detect
parity bit (at receiving) at serial-data I/O
Note: Since parity cannot be used in operation mode 1 or 2, always set this bit to 0.
When parity provided (PEN = 1), selects odd or even parity
Bit to selects length of stop bit that is frame end mark for send data in
bit
asynchronous transfer mode
Note: At receiving, only the first stop bit is detected.
data length of transmitted/receive data
Bit to specify
Note: 7 bits can be selected only in operation mode 0 (asynchronous). In operation
mode 1 (multiprocessor mode) or operation mode 2 (synchronous), always select
8 bits (CL = 1).
• Specifies data format for frame sent/received in multiprocessor mode (mode 1)
• Normal data is selected when this bit is 0. Address data is selected when it is 1.
• Bit to clear FRE, ORE, and PE flags of status register (SSR)
• These flags are cleared when 0 is written to this bit. When 1 is written, this bit remains
unchanged and has no affect on others.
Note: When the receive interrupt is enabled during UART operation, clear the REC bit
only when one of the FRE, DRE, and PE flags is 1.
• Bit to control UART reception
• Reception is disabled when this bit is 0; reception is enabled when it is 1.
Note: When receiving is disabled during reception, receiving is stopped at the instant
reception of the current frame is completed and the received data is stored in the
receive data buffer (SIDR1).
• Bit to control UART transmission
• Transmission is disabled when this bit is 0; transmission is enabled when it is 1.
Note: When the transmitting is disabled during transmission, transmitting is stopped
after data in the transmit data buffer (SODR1) is exhausted.
UART
Function
12-11