Overview Of Reset; Table 3-1 Reset Factor - Fujitsu MB90420/5 (A) Series Hardware Manual

This chapter explains the reset.

3.1 Overview of Reset

When a reset factor occurs, the CPU immediately suspends the current processing and waits until reset is
canceled. After the reset is canceled, processing is started at the address indicated by the reset vector. 6
reset factors are shown below.
• Power-on
• Overflow of watchdog timer
• Detection of low power supply voltage
• Overflow of CPU operation detection function counter
• External reset request by RSTX pin
• Software reset request
n Reset factors
Table 3-1 shows the reset factor.
Reset
Power-on At power-on
External pin Input "L" level to RSTX pin
"0" is written to the RST bit of the
Software
low-power consumption mode
control register (LPMCR).
Watchdog Timer Watchdog timer overflow
Detection of low When low power supply voltage
voltage* detected
CPU operation When overflow occurs in CPU
detection function* operation detection function counter
MCLK : Main clock (2-divided oscillation clock)
* : This factor causes a reset only for the MB90420A Series and MB90425A series.
• External reset
An external reset is generated when the "L" level is input to the external reset pin (RSTX pin). The
duration of the "L" level input to the RSTX pin must be at least 16 machine cycles (16/φ) . An external
reset does not require the oscillation stabilization wait time.
Remark: The reset cancel wait state occurs after termination of the instruction only when a reset request is
issued from the RSTX pin at a reset resource occured during write (during execution of transfer
family instruction such as MOV). As a result, write terminates normally even when a reset is input
during write. However, a string fammily instruction (such as MOVS), accepts the reset before data
transfer for the specified counter is completed. Consequently, transfer of all data for string family
instructions is not assured.
RESET

Table 3-1 Reset Factor

Factor
Main clock
Main clock
Main clock
Main clock
Main clock
Main clock
3-3
Machine
Watchdog Timer
Clock
Stopped
(MCLK)
Stopped
(MCLK)
Stopped
(MCLK)
Stopped
(MCLK)
Stopped
(MCLK)
Stopped
(MCLK)
Oscillation
Stabilization Wait
Awaited
None
None
None
Awaited
None