Fujitsu MB90420/5 (A) Series Hardware Manual page 10

19.6 Explanation of 8-/10-bit A/D Converter Operation .......................................................... 19-16
19.6.1 Conversion Using EI2OS........................................................................................ 19-19
19.6.2 A/D-converted Data Protection Function.............................................................. 19-20
19.7 Precautions at Using 8-/10-bit A/D Converter ................................................................. 19-22
19.8 Sample Program 1 for 8-/10-bit A/D Converter (EI
19.9 Sample Program 2 for 8-/10-bit A/D Converter (EI
19.10 Sample Program 3 for 8-/10-bit A/D Converter (EI
Chapter 20 Sound Generator............................................................................................. 20-1
20.1 Overview of Sound Generator ............................................................................................ 20-3
20.2 Sound Generator Registers ................................................................................................ 20-4
20.2.1 Sound Control Register............................................................................................ 20-5
20.2.2 Frequency Data Register.......................................................................................... 20-7
20.2.3 Amplitude Data Register .......................................................................................... 20-8
20.2.4 Decrement Grade Register....................................................................................... 20-9
20.2.5 Tone Count Register................................................................................................. 20-9
Chapter 21 ROM Correction .............................................................................................. 21-1
21.1 Overview of ROM Correction .............................................................................................. 21-3
21.2 Application Example of ROM Correction........................................................................... 21-6
21.2.1 Correction Example of Program Errors .................................................................. 21-7
21.2.2 Example of Correction Processing ......................................................................... 21-8
Chapter 22 ROM Mirror Function Select Module.............................................................. 22-1
22.1 Overview of ROM Mirror Function Select Module ............................................................ 22-3
22.2 ROM Mirror Function Select Register (ROMM) ................................................................. 22-4
Chapter 23 Can Controller ................................................................................................. 23-1
23.1 Features of CAN Controller................................................................................................. 23-3
23.2 Block Diagram of CAN Controller ...................................................................................... 23-4
23.3 List of Overall Control Registers........................................................................................ 23-5
23.4 List of Message Buffers (ID Registers) .............................................................................. 23-7
23.5 List of Message Buffers (DLC Registers and Data Registers) ........................................ 23-9
23.6 Classifying CAN Controller Registers ............................................................................. 23-11
23.6.1 Control Status Register (CSR) ............................................................................... 23-12
23.6.2 Bus Operation Stop Bit (HALT = 1) ....................................................................... 23-14
23.6.3 Last Event Indicate Register (LEIR) ...................................................................... 23-15
23.6.4 Receive and Transmit Error Counters (RTEC) ..................................................... 23-16
23.6.5 Bit Timing Register (BTR) ...................................................................................... 23-17
23.6.6 Message Buffer Valid Register (BVALR) .............................................................. 23-19
23.6.7 IDE register (IDER) .................................................................................................. 23-19
23.6.8 Transmission Request Register (TREQR) ............................................................ 23-20
23.6.9 Transmission RTR Register (TRTRR) ................................................................... 23-20
23.6.10 Remote Frame Receiving Wait Register (RFWTR) .............................................. 23-21
2
OS Start in Single-shot Mode) ..... 19-23
2
OS Start in Continuous Mode) ..... 19-25
2
OS Start in Stop Mode) ................. 19-27
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