Serial Control Register 0, 1 (Scr0, Scr1) - Fujitsu MB90335 Series Hardware Manual

MB90335 Series
18.4.1

Serial Control Register 0, 1 (SCR0, SCR1)

Serial control registers 0, 1 (SCR0, SCR1) are responsible for setting parity, selecting
the stop bit length and data length, selecting the frame data format in mode 1, clearing
receiving error flags, and enabling/disabling send and receive operations.
■ Serial Control Register 0, 1 (SCR0, SCR1)
Address
ch.0 : 000021
H
ch.1 : 000027
H
R/W : Readable/Writable
W: Write only
: Initial value
CM44-10137-6E
Figure 18.4-2 Serial Control Register 0, 1 (SCR0, SCR1)
bit15 bit14 bit13 bit12 bit11 bit10
CL
PEN P SBL
R/W R/W R/W R/W
R/W
FUJITSU MICROELECTRONICS LIMITED
bit9
bit8 bit7
A/D RXE
REC TXE (SMR0, SMR1)
W R/W R/W
Bit indicating that sending operation
TXE
0 Sending operation disabled
1
Sending operation enabled
RXE
Bit indicating that receiving operation
0 Receiving operation disabled
1
Receiving operation enabled
Receiving error clear bit
REC
0
Clear FRE, ORE, PE flag.
1
The conversion is not changed and no others are affected
A/D Address/Data selection bit
0 Data frame
1 Address frame
CL
Data length selection bit
7 bit
0
8 bit
1
SBL Stop bit length selection bit
0
1 bit length
1
2 bit length
Parity selection bit
P
Only enable when parity is existent (PN = 1)
Even parity
0
Odd parity
1
Parity enable bit
PEN
No Parity
0
With Parity
1
CHAPTER 18 UART
18.4 Register of UART
bit0
Initial value
00000100
B
393