16-Bit Timer/Event Counter Operation - NEC V850ES/SA2 UPD703201 Manual

7.1.5

16-bit timer/event counter operation

(1) Count operation
The 16-bit timer/event counter can function as a 16-bit free-running timer or as an external signal event
counter. The setting for the type of operation is specified by timer mode control registers n0 and n1 (TMCn0
and TMCn1) (n = 0, 1).
When it operates as a free-running timer, if the CCn0 or CCn1 register and the TMn register count value
match, an interrupt signal is generated and the timer output signal (TOn) can be set or reset. Also, a capture
operation that holds the TMn register count value in the CCn0 or CCn1 register is performed, in
synchronization with the valid edge that was detected from the external interrupt request input pin as an
external trigger. The capture value is held until the next capture trigger is generated.
Caution When using the INTPn0/TIn0 pin as an external clock input pin (TIn0), be sure to disable the
INTPn0 interrupt or set CCn0 to compare mode (n = 0, 1).
Count clock
TMn 0000H
Count start
TMCEn←1
Remark n = 0, 1
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CHAPTER 7 TIMER/COUNTER FUNCTION
Figure 7-2. Basic Operation of 16-Bit Timer/Event Counter
0001H 0002H 0003H
∆
Preliminary User's Manual U15905EJ1V0UD
FBFEH FBFFH 0000H
∆ ∆
Count disabled Count start
TMCEn←0 TMCEn←1
0001H 0002H