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High−level Instructions
F132
(BTI)
P132
(PBTI)
Outline
Inverts a specified bit in 16-bit data.
For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction
"P132 (PBTI)" is are not available.
Program example
Trigger
R0
10
F132 BTI , DT 0 , DT 10
D
n
Operands
Relay
Operand
Operand
WX WY WR
D
N/A
A
n
A
A
(*1) This cannot be used with the FP0 and FP−e.
(*2) This cannot be used with the FP0, FP−e, FP0R, FPΣ, FP−X.
(*3) With the FP0R, FPΣ, FP−X, FP2, FP2SH, and FP10SH, this is I0 to IC.
(*4) With the FP0R, FPΣ, FP−X, FP2, FP2SH, and FP10SH, this is ID.
Explanation of example
Inverts the state of bit specified by DT10 in data register DT0 when trigger R0 turns on.
When the DT10 = K7, as shown below.
[n] DT10: K7
Bit position
15
12
· ·
[D]
0 0 0
DT0
Bit position
15
12
· ·
[D]
DT0
0
0 0
3 − 294
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16-bit data bit invert
Ladder Diagram
Ladder Diagram
D
16-bit area
16-bit equivalent constant or 16-bit area to specify bit position
Timer/Counter
WL
SV
EV
(*1)
A
A
A
A
A
A
A
A
11
8
7
4
3
·
·
· ·
· ·
0
0 0 0
1
0 0 1
1
0 0 1
R0: on
11
8
7
4
3
·
·
· ·
· ·
0
0
0 0
1
1
0 1
1
0
0 1
Condition of bit position 7 is inverted [off (0) → on (1)] when R0 turns on.
(Bits other than the specified bit are not changed.)
n
Index
Register
register
LD
FL
IX
DT
(*1)
(*2)
(*3)
(*4)
A
A
A
A
A
A
A
A
0
0
0
0
Boolean
Address
Instruction
10
ST
11
F132
DT
DT
Constant
Index
Index
modifier
IY
K
H
A
N/A
N/A
A
A
A
A
A
A:
Available
N/A: Not Available
R
0
(BTI)
0
10
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