Panasonic FP-E Programming Manual page 546

Fp series
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High−level Instructions
F125
(DROR)
P125
(PDROR)
Outline
Rotates a specified number of bits in specified 32-bit data to the right.
For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction
"P125 (PDROR)" is not available.
Program example
Trigger
R0
10
F125 DROR, DT10,
D
n
Operands
Relay
Operand
Operand
WX WY WR WL
D
N/A
A
n
A
A
(*1) This cannot be used with the FP0R, FPΣ and FP−X.
Explanation of example
Rotates 4 bits in data registers DT11 and DT10 to the right when trigger R0 turns on.
When 4 bits are rotated to the right, the data in bit position 3 is transferred to special internal relay R9009
(carry flag).
31
[DT11, DT10]
1 0 1 0
R0: on
[DT11,DT10]
1 0 1 1
3 − 282
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32-bit data right rotation
Ladder Diagram
Ladder Diagram
D
Lower 16-bit area of 32-bit data
16-bit equivalent constant or 16-bit area to specify number of bits to be rotated
Range of n: K0 to K255 (H0 to HFF)
Timer/Counter
SV
EV
A
A
A
A
A
A
A
A
28 27
8 7
4 3
· · ·
1 1 0 0
1 0 1 1
1 0 1 0
1 1 0 0
K4
n
Index
Register
register
FL
DT
LD
I
(*1)
A
A
A
A
A
A
A
A
0
CY
Boolean
Address
Instruction
10
ST
R
11
F125
DT
K
Constant
Index
Index
modifier
K
H
f
N/A N/A N/A
A
A
A
N/A
A
A:
Available
N/A: Not Available
0
(DROR)
10
4
Integer
Integer
device
N/A
N/A

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