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F26
(D−)
P26
(PD−)
Outline
Subtracts 32-bit data from the minuend.
For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction
"P26 (PD−)" is not available.
Program example
Trigger
R0
10
S
D
Operands
Relay
Operand
Operand
WX WY WR
S
A
A
D
N/A
A
(*1) This cannot be used with the FP0 and FP−e.
(*2) This cannot be used with the FP0, FP−e, FP0R, FPΣ, FP−X.
(*3) With the FP0R, FPΣ, FP−X, FP2, FP2SH, and FP10SH, this is I0 to IC.
(*4) With the FP0R, FPΣ, FP−X, FP2, FP2SH, and FP10SH, this is ID.
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32-bit data subtraction
[(D+1, D) − (S+1, S) → (D+1, D)]
Ladder Diagram
Ladder Diagram
F26 D− , DT 10 , DT 20
S
32-bit equivalent constant or lower 16-bit area of 32-bit area (for subtrahend)
Lower 16-bit area of 32-bit data (for minuend and result)
Timer/Counter
WL
SV
EV
(*1)
A
A
A
A
A
A
A
A
D
Index
Register
register
LD
FL
IX
DT
(*1)
(*2)
(*3)
(*4)
A
A
A
A
N/A
A
A
A
A
N/A
High−level Instructions
Boolean
Address
Instruction
10
ST
11
F 26
DT
DT
Constant
Index
Index
modifier
IY
K
H
A
A
A
N/A
N/A
A
A:
Available
N/A: Not Available
R
0
(D−)
10
20
3 − 69
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