Panasonic FP-E Programming Manual page 191

Fp series
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The execution state (start/stop) for processes are stored in special data registers:
Type
FP0 C10, C14, C16, C32/
FP−e
FP0 T32/FP0R
FPΣ/FP−X/FP2/FP2SH/
FP10SH
Example:
The start−up conditions for processes No. 16 through No. 31
Bit position
Process number
DT9061/DT90061
When bit position 8 of DT9061/DT90061 is "1", the process no. 24 is starting.
Notes on process clear
If the next step instruction is executed in an active process, that process is automatically cleared. However,
the actual clear operation does not occur until the next scan. Therefore, for one scan during the process
transition, there will be two simultaneously active processes. If you do not want them to be on at the same
time, program with an interlock circuit. If there is a possibility of processes being simultaneously on because
of hardware response delays, adapt hardware processing to take the response delay into account.
Example:
If the process is cleared, the instructions in that process operate as follows.
Instruction
Operation status
OT
All off
KP
Holds the state.
SET
Holds the state.
RST
Holds the state.
TM
Reset the elapsed value and timer contact output.
CT
Holds the state at the time just before the trigger turns off.
SR
Holds the state at the time just before the trigger turns off.
DF and DF/ (*)
Remembers the state of execution condition (trigger).
Other instructions
Not executed.
(*): Same operation as when the execution condition (trigger) for the MC instruction turns off. Refer to the
explanation of the MC and MCE instructions.
Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com
Special data register
DT9060 to DT9067
DT90060 to DT90067
DT90060 to DT90122
. .
15
12 11
. .
31
28 27
0
0
0
0
SSTP 0
Y11
X0
NSTP 1
SSTP 1
Y10
. .
. .
. .
8 7
4 3
. .
. .
. .
24 23
20 19
0
0
0
0
0
0
0
0
0
0
1
Y10
Y11
Basic Instructions
0
16
0
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