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High−level Instructions
F128
(DRCL)
P128
(PDRCL)
Outline
Rotates a specified number of bits in the specified 32-bit data to the left
together with carry flag data.
For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction
"P128 (PDRCL)" is not available.
Program example
Trigger
R0
10
F128 DRCL, DT10,
D
n
Operands
Relay
Operand
Operand
WX WY WR WL
D
N/A
A
n
A
A
(*1) This cannot be used with the FP0R, FPΣ and FP−X.
Explanation of example
Rotates 4 bits in data registers DT11 and DT10 together with carry flag data to the left when trigger R0 turns
on.
The data in bit position 28 is transferred to carry flag (special internal relay R9009).
The data of the carry flag is transferred to the bit position 3.
31
28 27
[DT11, DT10]
1 0 1
0
@
0
Carry flag
[DT11, DT10]
1 1 0 0
3 − 288
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32-bit data left rotation with carry flag data
Ladder Diagram
Ladder Diagram
D
Lower 16-bit area of 32-bit data
16-bit equivalent constant or 16-bit area to specify number of bits to be rotated
Range of n: K0 to K255 (H0 to HFF)
Timer/Counter
SV
EV
A
A
A
A
A
A
A
A
·
·
·
24 23
4 3
1 1 0 0
1 0 1 1
1 0 1 1
1 1 0 1
K4
n
Index
Register
register
FL
DT
LD
I
(*1)
A
A
A
A
A
A
A
A
0
Carry flag
1
R0: on
@
Boolean
Address
Instruction
10
ST
R
11
F128
DT
K
Constant
Index
Index
modifier
K
H
f
N/A N/A N/A
A
A
A
N/A
A
A:
Available
N/A: Not Available
0
(DRCL)
10
4
Integer
Integer
device
N/A
N/A
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