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F66
(WOR)
P66
(PWOR)
Outline
Performs bit-wise OR operation on two 16-bit data items.
For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction
"P66 (PWOR)" is not available.
Program example
Trigger
R0
10
F66 WOR , DT10 , DT20 , DT30
S1
S2
D
Operands
Relay
Operand
Operand
WX WY WR
S1
A
A
S2
A
A
D
N/A
A
(*1) This cannot be used with the FP0 and FP−e.
(*2) This cannot be used with the FP0, FP−e, FP0R, FPΣ, FP−X.
(*3) With the FP0R, FPΣ, FP−X, FP2, FP2SH, and FP10SH, this is I0 to IC.
(*4) With the FP0R, FPΣ, FP−X, FP2, FP2SH, and FP10SH, this is ID.
Explanation of example
Performs OR operation on each bit in data registers DT10 and DT20 when trigger R0 turns on.
The OR operation result is stored in data register DT30.
Bit position
15
[S1]
DT10
0 1 0
Bit position
15
[S2]
DT20
0 0 0
Bit position
15
[D]
DT30
0 1 0
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16-bit data OR
Ladder Diagram
Ladder Diagram
S1
S2
16-bit equivalent constant or 16-bit area
16-bit equivalent constant or 16-bit area
16-bit area for storing OR operation result
Timer/Counter
WL
SV
EV
(*1)
A
A
A
A
A
A
A
A
A
A
A
A
·
· ·
·
·
·
12
11
8
7
0
1 1 0
1
1 0 1
·
· ·
·
·
·
12
11
8
7
0
0 0 0
0
1 1 1
R0: on
·
· ·
·
·
·
12
11
8
7
0
1 1 0
1
1 1 1
D
Index
Register
register
LD
FL
IX
IY
DT
(*1)
(*2)
(*3)
(*4)
A
A
A
A
A
A
A
A
A
A
A
A
·
·
·
4
3
0
1
1 0 0
1
·
·
·
4
3
0
1
1 1 1
1
·
·
·
4
3
0
1
1 1 1
1
High−level Instructions
Boolean
Address
Instruction
10
ST
11
F 66
DT
DT
DT
Constant
Index
Index
modifier
K
H
A
A
A
A
A
A
A
A
A
N/A
N/A
A
A:
Available
N/A: Not Available
R
0
(WOR)
10
20
30
3 − 145
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