Lucent DDM-2000 OC-3 User And Service Manual page 887

DLP-523
: Detailed Level Procedure
Page 5 of 30
NOTE:
Table B depicts all the possible timing topologies which can be
encountered on adjacent network elements (NE) with some comments or
cautionary notes on their application.
Table B – BBF2 TGS Synchronization Provisioning Topologies
NE 1
Free Running
Free Running
Free Running
External - Mult
External - Mult
NE 2
Free Running
Line Timing
External - Mult
Line Timing
External - Mult
DDM-2000 OC-3 M
Issue 2, February 2000
Application Comments
This topology is not supported. Both systems are
operating asynchronously from each other.
This topology is allowed but results in having a
SONET subnetwork operating asynchronously with
respect to other NE's in the network. The NE's
deriving timing off the NE provisioned for Free
Running will be synchronized to it but not to a PRS
on the network. If automatic synchronization
reconfiguration is supported and enabled in a
system, the NE 2 system will attempt to switch to
another better quality line timing source, if
available.
This timing topology is not supported. The two
network elements will be operating asynchronously
from each other.
This topology is used when one of the NE's does
not have access to an external synchronous
reference and needs to be synchronized to an NE
whose timing is traceable to a PRS. The NE
provisioned for Line Timing will derive its timing
from the NE provisioned for External - Mult timing
thus operating synchronously with that respective
NE. The NE provisioned for External - Mult timing
could use its DS1 output to distribute its incoming
DS1 timing reference to other shelves in the bay to
conserve ports on the BITS.
This topology is used when both NE's have access
to and are receiving its timing from BITS clocks.
The recommendation is to have these BITS
synchronized to references which are traceable to
the same PRS. If these guidelines are followed the
subnetwork created by these two NE's would be
operating synchronously. Note: DDM-2000
systems are designed to operate in pleisiochronous
timing topologies. The DS1 output generated by
each NE is regenerated from the input DS1 timing
reference and could be used to distribute this
reference to other shelves colocated in the same
bay to conserve ports on the BITS.
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