Section 13 Ram; Overview; Block Diagram - Hitachi H8/3035 Series Hardware Manual

13.1 Overview

The H8/3035 Series has 4 kbytes of on-chip static RAM. The RAM is connected to the CPU by a
16-bit data bus. The CPU accesses both byte data and word data in two states, making the RAM
suitable for rapid data transfer.
The H8/3035 Series on-chip RAM is assigned to addresses H'FEF10 to H'FFF0F in modes 1 and
3 and to addresses H'FFEF10 to H'FFFF0F in mode 2. The RAM enable bit (RAME) in the
system control register (SYSCR) can enable or disable the on-chip RAM.

13.1.1 Block Diagram

Figure 13-1 shows a block diagram of the on-chip RAM.
Legend
SYSCR: System control register
Note: * Lower 20 bits of the address
Figure 13-1 RAM Block Diagram (H8/3035 in Modes 1 and 3)

Section 13 RAM

Internal data bus (upper 8 bits)
Internal data bus (lower 8 bits)
Bus interface
*
H'FEF10
H'FEF12*
On-chip RAM
H'FFF0E *
Even addresses Odd addresses
SYSCR
*
H'FEF11
*
H'FEF13
H'FFF0F *
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