Verifying The Execution State Of The Automatic Algorithm - Fujitsu F2MC-16LX Hardware Manual

CHAPTER 26 2M BIT FLASH MEMORY

26.5 Verifying the Execution State of the Automatic Algorithm

The flash memory contains dedicated hardware indicating the internal operation state
of the flash memory and whether operations have been completed that can be used to
control the operational flow of write/erase operations via the automatic algorithm. The
automatic algorithm can verify the operation state of the built-in flash memory using
the sequence of hardware accesses described below.
I Hardware sequence flags
The hardware sequence flags consist of the four bits DQ7, DQ6, DQ5, and DQ3. These bits
have the following functions: DQ7 is the data polling flag, DQ6 is the toggle bit flag, DQ5 is the
timing limit excess flag, and DQ3 is the sector erase timer flag. The hardware sequence flags
can therefore be used to confirm that writing or chip sector erase has been completed or that
erase code write is valid.
To reference the hardware sequence flag, read the address of the sector for the internal flash
memory after the corresponding command sequence has been set (refer to Table 26.4-1
"Command sequence table").
shows the bit assignments of the hardware sequence flags.
Table 26.5-1 Bit assignments of hardware sequence flags
Bit number
Hardware sequence flag
To check whether automatic write/chip sector erase is in progress, check either the hardware
sequence flags or the RDY bit of the flash memory control register (FMCS) to determine
whether the last write operation has already ended. After the end of a write/erase operation, the
operational state returns to read/reset. During actual programming, perform the subsequent
operations, such as reading data, only after checking either flag for whether automatic writing/
erasing has ended. Similarly, whether a sector erase code can be issued again can be verified
with the hardware sequence flag. The hardware sequence flags are described below.
Table 26.5-2 "List of hardware sequence flag functions" lists the hardware sequence flag
functions.
476
Table 26.5-1 "Bit assignments of hardware sequence flags"
7 6 5
DQ7 DQ6 DQ5
4 3 2
- DQ3 -
1 0
- -